1. Field of the Invention
The present invention relates to a semiconductor memory device such as an electrically data erasable/rewritable non-volatile semiconductor memory device (e.g., EEPROM). In particular, the present invention relates to a batch erasable semiconductor memory device such as a flash memory, which is capable of erasing or writing data in a specified block in a memory-cell array while reading data from other specified block.
2. Description of the Related Art
In a recent advanced flash memory, there has been proposed a so-called RWW (Read While Write) type memory system. In order to reduce the number of memory chips required for the system, the memory system makes it possible to read data in a specified memory area while to write or erase data in other specified area.
For example, JPN. PAT. APPLN. KOKAI Publication No. 2001-325795 publicly opened on Nov. 22, 2001 discloses a semiconductor device capable of realizing the following flash memory. The flash memory can simultaneously execucte the data write or erase operation in one or more banks and the data read operation in other bank.
In the flash memory having the simultaneously executable function described above, when erasing data at a unit of memory block, each memory block is provided with the corresponding block selection register. Of the block selection registers, specified block selection registers corresponding to erase object section blocks specified across a plurality of banks hold erase flags. The logical sum of the erase flags of the block selection registers corresponding to memory blocks erase-specified across two or more banks is obtained, to generate a busy signal for all erase object selection blocks.
When serially erasing data from all erase selection blocks at a unit of block, the block selection register corresponding to each erase-object selection block is configured in the following manner. The block selection registers hold or latch erase flags corresponding to all erase-object selection blocks when an erase command is inputted, and the latched flags are reset after the erase operation of all erase-object selection blocks across several banks is completed.
Therefore, when serially erasing data from the erase-object selection blocks selected across a plurality of banks at a unit of block, there is the following problem. Thus, when the erase operation in a bank having the erase-object selection blocks is completed, while the erase operation in the remaining erase-specified banks is not completed, data read is impossible until the erase operation of all erase object selection blocks specified in the remaining banks is completed.
This is disadvantageous in the case of carrying out a test process of reconfirming whether or not cell data of each erase-object selection block is normally erased. In other words, data read from a desired bank including erase-object selection blocks is impossible even if the data of all the erase-object selection blocks in this bank is completely erased, until all erase operations of remaining erase-object selection blocks of all specified banks are completed. This causes much time loss in the test process; as a result, test time becomes long.